Although the PCI (Peripheral Component Interconnect) Bus has been widely used as a general purpose I/O interconnect standard over the last ten years, it is beginning to hit the limits of its capabilities. Extensions to the PCI standards, such as 64-bit slots and clock speeds of 66 MHz or 100 MHz, have been made, but cannot continue to meet the rapidly increasing bandwidth demands in PCs over the next few years. PCI Express™ has been recently developed to meet this challenge and takes the form of a serial bus architecture.
MicroTCA and AdvancedTCA provided PCI-Express™ switched fabric connectivity. In these platforms, PCI-Express™ switching is supplied by a central switching function for the entire chassis and a processing “root complex” provides the control function. The central switching function creates one continuous domain of PCI-Express™ within the chassis.
The prior art PCI-Express™ switching functions do not allow for multiple, smaller PCI-Express™ domains within a chassis rather than a single unified domain. This is a limitation in multiprocessing systems where multiple control functions are useful. Further, the number and size of these smaller domains will vary from application to application. Currently, there is no method of reconfiguring a PCI-Express™ switching function by a user subsequent to manufacturing. This has the disadvantage of making it difficult for a user to customize and modify the number and size of PCI-Express™ domains within a chassis.
There is a need, not met in the prior art, of a method and apparatus to allow the number and size of PCI-Express™ domains to be varied by a user. Accordingly, there is a significant need for an apparatus that overcomes the deficiencies of the prior art outlined above.
Elements in the Figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the Figures may be exaggerated relative to other elements to help improve understanding of various embodiments of the present invention. Furthermore, the terms “first”, “second”, and the like herein, if any, are used inter alia for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. Moreover, the terms “front”, “back”, “top”, “bottom”, “over”, “under”, and the like in the Description and/or in the Claims, if any, are generally employed for descriptive purposes and not necessarily for comprehensively describing exclusive relative position. Any of the preceding terms so used may be interchanged under appropriate circumstances such that various embodiments of the invention described herein may be capable of operation in other configurations and/or orientations than those explicitly illustrated or otherwise described.